The or 2. The 34,,bits of memory are organized as 8, pages of bytes or bytes each. These buffers allow the receiving of data while a page in the main memory is being reprogrammed, as well as the writing of a continuous data stream. EEPROM electrically erasable and programmable read-only memory emulation bit or byte alterability is easily handled with a self-contained, three-step read-modify-write operation. The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many commercial and industrial applications where high density, low pin count, low voltage and low power are essential.
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The 34,,bits of memory are organized as 8, pages of bytes or bytes each. These buffers allow the receiving of data while a page in the main memory is being reprogrammed, as well as the writing of a continuous data stream. EEPROM electrically erasable and programmable read-only memory emulation bit or byte alterability is easily handled with a selfcontained, three-step read-modify-write operation.
Unlike conventional flash memories, which are accessed randomly with multiple address lines and a parallel interface, Atmel devices use a RapidS serial interface to sequentially access its data. The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size.
The device is optimized for use in many commercial and industrial applications where high density, low pin count, low voltage and low power are essential. To allow for simple, in-system reprogrammability, the AT45DBD does not require high input voltages for programming.
The device operates from a single power supply, 2. All programming and erase cycles are self timed. Figure Pin configurations and pinouts. Future die shrinks will support 8-pin packages only. When the CS pin is deasserted, the device will be deselected and normally be placed in the standby mode not deep powerdown mode , and the output pin SO will be in a high-impedance state.
When the device is deselected, data will not be accepted on the input pin SI. A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition is required to end an operation. When ending an internally self-timed operation such as a program or erase cycle, the device will not enter the standby mode until the completion of the operation.
Serial Clock This pin is used to provide a clock to the device, and is used to control the flow of data to and from the device. The power of two page size is a one-time programmable configuration register, and once the device is configured for power of two page size, it cannot be reconfigured again. The devices are initially shipped with the page size set to bytes. The user has the option of ordering binary page size byte devices from the factory.
The page for the binary page size can now be programmed. If the above steps to set the page size prior to page programming are not followed, incorrect data during a read operation may be encountered.
Programming the Configuration Register To program the configuration register for power of two binary page size, the CS pin must first be asserted, as it would be with any other command. Once the CS pin has been asserted, the appropriate four-byte opcode sequence must be clocked into the device in the correct order. After the last bit of the opcode sequence has been clocked in, the CS pin must be deasserted to initiate the internally self-timed program cycle.
The programming of the configuration register should take place in a maximum time of tP, during which time the status register will indicate that the device is busy. The device must be power cycled after the completion of the program cycle to set the power of two page size. If the device is powered-down before the completion of the program cycle, then setting the configuration register cannot be guaranteed. However, the user should check bit 0 of the status register to see whether the page size was configured for binary page size or not.
If not, the command can be issued again. To read the identification information, the CS pin must first be asserted, and then the opcode of 9FH must be clocked into the device. After the opcode has been clocked in, the device will begin outputting the identification data on the SO pin during the subsequent clock cycles. The first byte to be output will be the manufacturer ID, followed by two bytes of device ID information.
The fourth byte output will be the extended device information string length, which will be 00H to indicate that no extended Atmel AT45DBD 21 device information follows. As indicated in the JEDEC standard, reading the extended device information string length and any subsequent data is optional.
Deasserting the CS pin will terminate the manufacturer and device ID read operation and put the SO pin into a high-impedance state. The CS pin can be deasserted at any time, and does not require that a full byte of data be read. Standard parts are shipped with the page size set to bytes. The user is able to configure these parts to a byte page size, if desired. Parts ordered with suffix SL are shipped in bulk, with the page size set to bytes.
Parts ordered with suffix SL are shipped in tape and reel, with the page size set to bytes. Workaround Use block erase opcode 50H as an alternative. The block erase function is not affected by the chip erase issue. Other terms and product names may be trademarks of others. Disclaimer The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products.
Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications.
Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.
AT45DB321D-SU - 45DB321 32M Flash Memory Datasheet
Sierra IC Inc
Datasheet ID: AT45DB321D-SU 519051